This is a quick post, more information will follow later. I’m entering the world of reconfigurable hardware 😀
Here’s an image of the FPGA board I’ve designed:
It has an xc3s200 spartan 3 FPGA. It’s not one of the newest nor one of the biggest FPGAs around, but you can synthesize a Microblaze 32bit CPU in it and still have room for other logic.
And there are more good news: Xilinx provides a version of their IDE for Linux, and I even managed to program the FPGA using my JTAG cable and urJTAG. Here’s an image of urJTAG correctly recognizing the two chips in the JTAG chain:
Until now I’ve only written two simple VHDL programs, one that does an and gate, which is probably the equivalent of the “Hello world” for an FPGA, and one that divides the 50MHz clock on the board by 2^26, and uses the resulting ~1Hz frequency to blink a led. Both work as expected on the FPGA board.
So many interesting things to do, and so little time to do them… it’s 27 September and on 30 September I’ll have to go back to university… This year I had to write my thesis, and that resulted in no spare time during summer… 😦